`timescale 1ns / 10ps
module mult_test;

	parameter WIDTH = 8;

	reg  [WIDTH-1:0] A, B, part;
	reg clk, rst;

	wire [2*WIDTH-1:0] P;
	wire [2*WIDTH-1: 0] M;
	wire [$clog2(WIDTH+1)-1: 0] step;
	wire tick;
	wire vld;

	always #10 clk = ~clk;

	mult #(.WIDTH(WIDTH))
		dev (.clk(clk), .rst(rst), .vld(vld), .A(A), .B(B), .P(P), .move(M), .part(part), .step(step), .tick(tick));

	integer i;
	initial begin

		for (i = 0; i < $urandom_range(0, 315); i = i+1) begin
			$random;
		end

		$dumpfile("mult.vcd");
		$dumpvars(0, mult_test);

		{A, B, clk} <= 0;

		#10;
		rst <= 1;
		A <= 8'h0F;
		B <= 8'h0F;
		#10 rst <= 0;

		#(WIDTH * 8 * 10) $finish;

	end 

endmodule

bind mult_test.dev mult_verification #(.WIDTH(8)) mult_veri (
	.rst(rst), .clk(clk),
	.A(A), .B(B), .P(P), .vld(vld),
	.part(part), .part_comp(part_comp), .move(move), .step(step), .tick(tick)
);
